Conformal, uniform dielectric films have many applications in semiconductor manufacturing. One use of dielectric films is for the electrical isolation of adjacent transistors built on the same silicon wafer. Electrical isolation can be accomplished by employing a technology commonly known as shallow trench isolation (STI). In STI, trenches are etched into the silicon between adjacent transistor components and an insulating dielectric material, such as silicon dioxide, is formed within the trench.
Chemical vapor deposition (CVD) has traditionally been the method of choice for depositing silicon dioxide films into STI trenches. However, as design rules continue to shrink, the aspect ratios (depth to width) of STI features increase, and traditional CVD techniques can no longer provide adequately conformal films in these high aspect ratio features.
An alternative to CVD is atomic layer deposition (ALD). ALD methods involve self-limiting adsorption of reactant gases and can provide thin, conformal dielectric films within high aspect ratio features. An ALD-based dielectric deposition technique typically involves adsorbing a metal containing precursor onto the substrate surface, then, in a second procedure, introducing a silicon oxide precursor gas. The silicon oxide precursor gas reacts with the adsorbed metal precursor to form a thin film of metal doped silicon oxide. One drawback, however, to ALD is that the deposition rates are very low. Films produced by ALD are also very thin (i.e., about one monolayer); therefore, numerous ALD cycles must be repeated to adequately fill a gap feature. These processes are unacceptably slow in the manufacturing environment.
A related technique, referred to as rapid vapor deposition (RVD) processing, is another alternative. RVD is similar to ALD in that reactant gases are introduced alternately over the substrate surface, but in RVD the silicon oxide film can grow more thickly. Thus, RVD methods allow for rapid film growth similar to using CVD methods but with the film conformality of ALD methods. However, the properties of dielectric films formed using known RVD techniques are still not optimal for the high performance needs of today's devices. In particular, the dielectric constant (k) is considerably high. In addition, the wet etch rate, stress and post-anneal shrinkage properties of the film are higher than optimal.
What is therefore needed are improved methods for forming a low-k dielectric material in dielectric gap-fill applications such as forming STI structures.